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general description the max5094a/b/c/d/max5095a/b/c bicmos, high- performance, current-mode pwm controllers have all the features required for wide input-voltage range isolated/nonisolated power supplies. these controllers are used for low- and high-power universal input volt- age and telecom power supplies. the max5094/max5095 contain a fast comparator with only 60ns typical delay from current sense to the output for overcurrent protection. the max5094 has an inte- grated error amplifier with the output at comp. soft- start is achieved by controlling the comp voltage rise using external components. the oscillator frequency is adjustable from 20khz to 1mhz with an external resistor and capacitor. the tim- ing capacitor discharge current is trimmed allowing for programmable dead time and maximum duty cycle for a given frequency. the available saw-toothed waveform at r t c t can be used for slope compensation when needed. the max5095a/max5095b include a bidirectional syn- chronization circuit allowing for multiple controllers to run at the same frequency to avoid beat frequencies. synchronization is accomplished by simply connecting the sync of all devices together. when synchronizing with other devices, the max5095a/max5095b with the highest frequency synchronizes the other devices. alternatively, the max5095a/max5095b can be syn- chronized to an external clock with an open-drain out- put stage running at a higher frequency. the max5095c provides a clock output pulse (adv_clk) that leads the driver output (out) by 110ns. the advanced clock signal is used to drive the secondary-side synchronous rectifiers. the max5094a/b/c are available in the 8-pin so and 8-pin ?ax packages. the max5094d and max5095a/b/c are available in the 8-pin ?ax pack- age. all devices operate over the automotive tempera- ture range of -40? to +125?. applications universal input ac/dc power supplies isolated telecom power supplies isolated power-supply modules networking systems computer systems/servers industrial power conversion isolated keep-alive circuits features ? pin-for-pin replacement for ucc28c43 (max5094a) and ucc28c45 (MAX5094B) ? 2a drive source and 1a sink capability ? up to 1mhz switching frequency operation ? bidirectional frequency synchronization (max5095a/max5095b) ? advanced output drive for secondary-side synchronous rectification (max5095c) ? fast 60ns cycle-by-cycle current limit ? trimmed oscillator capacitor discharge current sets maximum duty cycle accurately ? accurate ?% start voltage with 0.8v hysteresis ? low 32? startup current ? 5v regulator output (ref) with 20ma capability ? versions with 0.3v current-sense threshold ? overtemperature shutdown max5094a/b/c/d/max5095a/b/c high-performance, single-ended, current-mode pwm controllers ________________________________________________________________ maxim integrated products 1 out gnd r t /c t 1 2 8 7 ref v cc fb cs comp max/so top view 3 4 6 5 max5094 pin configurations ordering information 19-3864; rev 3; 10/06 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range pin- package pkg code max5094a asa -40 c to +125 c 8 so s8-4 max5094aasa+ -40 c to +125 c 8 so s8-4 max5094aaua* -40 c to +125 c 8 ?ax u8-1 max5094aaua+ -40 c to +125 c 8 ?ax u8-1 MAX5094B asa* -40 c to +125 c 8 so s8-4 MAX5094Basa+ -40 c to +125 c 8 so s8-4 MAX5094Baua* -40 c to +125 c 8 ?ax u8-1 MAX5094Baua+ -40 c to +125 c 8 ?ax u8-1 pin configurations continued at end of data sheet. ?ax is a registered trademark of maxim integrated products, inc. + denotes lead-free package. * future product?ontact factory for availability. ordering information continued at end of data sheet.
max5094a/b/c/d/max5095a/b/c high-performance, single-ended, current-mode pwm controllers 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v cc = +15v, r t = 10k ? , c t = 3.3nf, ref = open, c ref = 0.1?, comp = open, v fb = 2v, cs = gnd, t a = t j = -40? to +85? , unless otherwise noted.) (note 1) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v cc (low-impedance source) to gnd ..................-0.3v to +30v v cc (i cc < 30ma).....................................................self limiting out to gnd ...............................................-0.3v to (v cc + 0.3v) out current............................................................. 1a for 10? fb, sync, comp, cs, r t /c t , ref to gnd .............-0.3v to +6v comp sink current (max5094)..........................................10ma continuous power dissipation (t a = +70?) 8-pin ?ax (derate 4.5mw/? above +70?) .............362mw 8-pin so (derate 5.9mw/? above +70?)...............470.6mw operating temperature range .........................-40? to +125? maximum junction temperature .....................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? parameter symbol conditions min typ max units reference output voltage v ref t a = +25?, i ref = 1ma 4.950 5.000 5.050 v line regulation ? v line 12v v cc 25v, i ref = 1ma 0.4 4 mv load regulation ? v load 1ma i ref 20ma 6 25 mv total output variation v reft 1ma i ref 20ma, 12v v cc 25v 4.9 5.1 v reference output-noise voltage v noise 10hz f 10khz, t a = +25? 50 ? reference output short circuit i s_sc v ref = 0v -30 -100 -180 ma oscillator initial accuracy t a = +25? 51 54 57 khz voltage stability 12v v cc 25v 0.2 0.5 % temp stability -40? t a +85? 0.5 % r t /c t voltage ramp ( p-p )v ramp 1.7 v r t /c t voltage ramp valley v ramp_valley 1.1 v v rt/ct = 2v, t a = +25? 7.9 8.3 8.7 discharge current i dis v rt/ct = 2v, -40? t a +85? 7.5 8.3 9.0 ma frequency range f osc 20 1000 khz error amplifier (max5094) fb input voltage v fb fb shorted to comp 2.465 2.5 2.535 v fb input bias current i b(fb) -0.01 -0.1 ? open-loop voltage gain a vol 2v v comp 4v 100 db unity-gain bandwidth f gbw 1 mhz power-supply rejection ratio psrr 12v v cc 25v (note 2) 60 80 db comp sink current i sink v fb = 2.7v, v comp = 1.1v 2 6 ma comp source current i source v fb = 2.3v, v comp = 5v -0.5 -1.2 -1.8 ma comp output high voltage v comph v fb = 2.3v, r comp = 15k ? to gnd 5 5.8 v comp output low voltage v compl v fb = 2.7v, r comp = 15k ? to ref 0.1 1.1 v current-sense amplifier (max5094a/MAX5094B) 2.85 3 3.26 v/v gain (notes 3, 4) a cs (max5094c/d, max5095_) 2.85 3 3.40 v/v
max5094a/b/c/d/max5095a/b/c high-performance, single-ended, current-mode pwm controllers _______________________________________________________________________________________ 3 electrical characteristics (continued) (v cc = +15v, r t = 10k ? , c t = 3.3nf, ref = open, c ref = 0.1?, comp = open, v fb = 2v, cs = gnd, t a = t j = -40? to +85? , unless otherwise noted.) (note 1) parameter symbol conditions min typ max units max5094a/b (note 3) 0.95 1 1.05 max5094c/max5094d (note 3) 0.275 0.3 0.325 maximum current-sense signal v cs_max v comp = 5v, max5095 0.275 0.3 0.325 v power-supply rejection ratio psrr 12v v cc 25v 70 db input bias current i cs v comp = 0v -1 -2.5 ? delay from cs to out t cs_delay 50mv overdrive 60 ns mosfet driver out low-side on-resistance v rds_onl i sink = 200ma 4.5 10 ? out high-side on-resistance v rds_onh i source = 100ma 3.5 7 ? i source (peak) i source c out = 10nf 2 a i sink (peak) i sink c out = 10nf 1 a rise time t r c out = 1nf 15 ns fall time t f c out = 1nf 22 ns undervoltage lockout/startup startup voltage threshold v cc_start 7.98 8.40 8.82 v minimum operating voltage after turn-on v cc_min 7.1 7.6 8.0 v undervoltage-lockout hysteresis uvlo hyst 0.8 v pwm max5094a/max5094c/max5095a 94.5 96 97.5 maximum duty cycle d max MAX5094B/max5094d/max5095b/ max5095c 48 49.8 50 % minimum duty cycle d min 0% supply current startup supply current i start v cc = 7.5v 32 65 ? operating supply current i cc v fb = v cs = 0v 3 5 ma zener bias voltage at v cc v z i cc = 25ma 24 26.5 v thermal shutdown thermal shutdown t shdn junction temperature rising 150 ? thermal shutdown hysteresis t hyst 4c synchronization (max5095a/max5095b only) (note 5) sync frequency range f sync 20 1000 khz sync clock input high threshold v syncinh 3.5 v sync clock input low threshold v syncinl 0.8 v sync clock input minimum pulse width t pw_syncin 200 ns sync clock output high level v syncoh 1ma external pulldown 4.0 4.7 v sync clock output low level v syncol r sync = 5k ? 0 0.1 v sync leakage current i sync v sync = 0v 0.01 0.1 ?
max5094a/b/c/d/max5095a/b/c high-performance, single-ended, current-mode pwm controllers 4 _______________________________________________________________________________________ electrical characteristics (continued) (v cc = +15v, r t = 10k ? , c t = 3.3nf, ref = open, c ref = 0.1?, comp = open, v fb = 2v, cs = gnd, t a = t j = -40? to +85? , unless otherwise noted.) (note 1) parameter symbol conditions min typ max units adv_clk (max5095c only) adv_clk high voltage v adv_clkh i adv_clk = 10ma source 2.4 3 v adv_clk low voltage v adv_clkl i adv_clk = 10ma sink 0.4 v adv_clk output pulse width t pulse 85 ns adv_clk rising edge to out rising edge t adv_clk 110 ns adv_clk source and sink current i adv_clk 10 ma electrical characteristics (v cc = +15v, r t = 10k ? , c t = 3.3nf, ref = open, c ref = 0.1?, comp = open, v fb = 2v, cs = gnd, t a = t j = -40? to +125? , unless otherwise noted.) (note 1) parameter symbol conditions min typ max units reference output voltage v ref t a = +25?, i ref = 1ma 4.950 5.000 5.050 v line regulation ? v line 12v v cc 25v, i ref = 1ma 0.4 4 mv load regulation ? v load 1ma i ref 20ma 6 25 mv total output variation v reft 1ma i ref 20ma, 12v v cc 25v 4.9 5.1 v reference output-noise voltage v noise 10hz f 10khz, t a = +25? 50 v reference output short circuit i s_sc v ref = 0v -30 -100 -180 ma oscillator initial accuracy t a = +25? 51 54 57 khz voltage stability 12v v cc 25v 0.2 0.5 % temp stability -40 c t a +125? 1 % r t /c t voltage ramp ( p-p )v ramp 1.7 v r t /c t voltage ramp valley v ramp_valley 1.1 v v rt/ct = 2v, t a = +25? 7.9 8.3 8.7 discharge current i dis v rt/ct = 2v, -40? t a +125? 7.5 8.3 9.0 ma frequency range f osc 20 1000 khz error amplifier (max5094) fb input voltage v fb fb shorted to comp 2.465 2.5 2.535 v fb input bias current i b(fb) -0.01 -0.1 ? open-loop voltage gain a vol 2v v comp 4v 100 db unity-gain bandwidth f gbw 1 mhz power-supply rejection ratio psrr 12v v cc 25v (note 2) 60 80 db comp sink current i sink v fb = 2.7v, v comp = 1.1v 2 6 ma comp source current i source v fb = 2.3v, v comp = 5v -0.5 -1.2 -1.8 ma comp output high voltage v comph v fb = 2.3v, r comp =15k ? to gnd 5 5.8 v comp output low voltage v compl v fb = 2.7v, r comp = 15k ? to ref 0.1 1.1 v
max5094a/b/c/d/max5095a/b/c high-performance, single-ended, current-mode pwm controllers _______________________________________________________________________________________ 5 electrical characteristics (continued) (v cc = +15v, r t = 10k ? , c t = 3.3nf, ref = open, c ref = 0.1?, comp = open, v fb = 2v, cs = gnd, t a = t j = -40? to +125? , unless otherwise noted.) (note 1) parameter symbol conditions min typ max units current-sense amplifier max5094a/MAX5094B 2.85 3 3.26 gain (notes 3, 4) a cs max5094c/d, max5095_ 2.85 3 3.40 v/v max5094a/b (note 3) 0.95 1 1.05 max5094c/max5094d (note 3) 0.275 0.300 0.325 maximum current-sense signal v cs_max v comp = 5v, max5095_ 0.275 0.300 0.325 v power-supply rejection ratio psrr 12v v cc 25v 70 db input bias current i cs v comp = 0v -1 -2.5 ? delay from cs to out t cs_delay 50mv overdrive 60 ns mosfet driver out low-side on-resistance v rds_onl i sink = 200ma 4.5 12 ? out high-side on-resistance v rds_onh i source = 100ma 3.5 9 ? i source (peak) i source c out = 10nf 2 a i sink (peak) i sink c out = 10nf 1 a rise time t r c out = 1nf 15 ns fall time t f c out = 1nf 22 ns undervoltage lockout/startup startup voltage threshold v cc_start 7.98 8.4 8.82 v minimum operating voltage after turn-on v cc_min 7.1 7.6 8.0 v undervoltage-lockout hysteresis uvlo hyst 0.8 v pwm max5094a/max5094c/max5095a 94.5 96 97.5 maximum duty cycle d max MAX5094B/max5094d/max5095b/ max5095c 48 49.8 50 % minimum duty cycle d min 0% supply current startup supply current i start v cc = 7.5v 32 65 ? operating supply current i cc v fb = v cs = 0v 3 5 ma zener bias voltage at v cc v z i cc = 25ma 24 26.5 v thermal shutdown thermal shutdown t shdn junction temperature rising 150 ? thermal shutdown hysteresis t hyst 4c synchronization (max5095a/max5095b only) (note 5) sync frequency range f sync 20 1000 khz sync clock input high threshold v syncinh 3.5 v sync clock input-low threshold v syncinl 0.8 v sync clock input minimum pulse width t pw_syncin 200 ns
max5094a/b/c/d/max5095a/b/c high-performance, single-ended, current-mode pwm controllers 6 _______________________________________________________________________________________ electrical characteristics (continued) (v cc = +15v, r t = 10k ? , c t = 3.3nf, ref = open, c ref = 0.1?, comp = open, v fb = 2v, cs = gnd, t a = t j = -40? to +125? , unless otherwise noted.) (note 1) parameter symbol conditions min typ max units sync clock output high level v syncoh 1ma external pulldown 4.0 4.7 v sync clock output low level v syncol r sync = 5k ? 0 0.1 v sync leakage current i sync v sync = 0v 0.01 0.1 ? adv_clk (max5095c only) adv_clk high voltage v adv_clkh i adv_clk = 10ma source 2.4 3 v adv_clk low voltage v adv_clkl i adv_clk = 10ma sink 0.4 v adv_clk output pulse width t pulse 85 ns adv_clk rising edge to out rising edge t adv_clk 110 ns adv_clk source and sink current i adv_clk 10 ma note 1 : all devices are 100% tested at +25?. all limits over temperature are guaranteed by design, not production tested. note 2: guaranteed by design, not production tested. note 3: parameter measured at trip point of latch with v fb = 0 (max5094 only). note 4: gain is defined as a = ? v comp / ? v cs , 0 v cs 0.8v for max5094a/MAX5094B, 0 v cs 0.2v for max5094c/max5094d/ max5095_. note 5 : output frequency equals oscillator frequency for max5094a/max5094c/max5095a. output frequency is one-half oscillator frequency for MAX5094B/max5094d/max5095b/max5095c. typical operating characteristics (v cc = 15v, t a = +25?, unless otherwise noted.) bootstrap uvlo vs. temperature max5094/95 toc01 temperature ( c) v cc (v) 110 95 65 80 -10 5 20 35 50 -25 0 1 2 3 4 5 6 7 8 9 10 -40 125 v cc rising v cc falling hysteresis 25 27 39 31 29 33 35 37 41 -40 -10 5 20 -25 35 50 95 80 110 65 125 startup current vs. temperature max5094/95 toc02 temperature ( c) i cc ( a) v cc = 7.5v 3.5 3.7 4.9 4.1 3.9 4.3 4.5 4.7 5.1 operating supply current vs. temperature after startup (f osc = f sw = 300khz) max5094/95 toc03 i cc (ma) -40 -10 5 20 -25 35 50 95 80 110 65 125 temperature ( c) c t = 560pf max5094a/max5094c/max5095a
max5094a/b/c/d/max5095a/b/c high-performance, single-ended, current-mode pwm controllers _______________________________________________________________________________________ 7 typical operating characteristics (continued) (v cc = 15v, t a = +25?, unless otherwise noted.) 4.90 4.94 4.92 5.00 4.98 4.96 5.02 5.04 5.06 5.08 reference voltage vs. temperature max5094/95 toc04 v ref (v) -40 -10 5 20 -25 35 50 95 80 110 65 125 temperature ( c) i ref = 1ma i ref = 20ma 4.65 4.75 4.70 4.85 4.80 5.00 4.95 4.90 5.05 020 10 30 40 50 60 70 reference voltage vs. reference load current max5094/95 toc05 i ref (ma) v ref (v) 4.980 4.984 4.982 4.988 4.986 4.992 4.990 4.994 4.998 4.996 5.000 10 14 16 12 18 20 22 24 26 reference voltage vs. supply voltage max5094/95 toc06 v cc (v) v ref (v) i ref = 1ma 450 470 460 500 490 480 510 520 540 530 550 -40 -10 5 -25 203550658095110125 oscillator frequency (f osc ) vs. temperature max5094/95 toc07 temperature ( c) oscillator frequency (khz) r t = 3.65k ? c t = 560pf 7.88 7.90 8.02 7.94 7.92 7.96 7.98 8.00 8.04 -40 -10 5 20 -25 35 50 95 80 110 65 125 oscillator r t /c t discharge current vs. temperature max5094/95 toc08 temperature ( c) r t /c t discharge current (ma) v rt/ct = 2v 0 20 10 50 40 30 60 70 90 80 100 maximum duty cycle vs. temperature max5094/95 toc09 duty cycle (%) max5094a/max5094c/max5095a -40 -10 5 20 -25 35 50 95 80 110 65 125 temperature ( c) MAX5094B/max5094d/max5095b/max5095c r t = 5k ? c t = 560pf 0 1000 1500 500 2000 2500 3000 3500 4000 maximum duty cycle vs. frequency max5094a/max5094c/max5095a max5094/95 toc10 oscillator frequency (khz) c t = 100pf c t = 220pf c t = 560pf c t = 1000pf 0 20 10 50 40 30 60 70 90 80 100 duty cycle (%) 0.90 0.94 0.92 1.00 0.98 0.96 1.02 1.04 1.08 1.06 1.10 current-sense trip threshold vs. temperature max5094/95 toc11a cs threshold (v) max5094a/MAX5094B -40 -10 5 20 -25 35 50 95 80 110 65 125 temperature ( c) v fb = 0v 0.20 0.24 0.22 0.30 0.28 0.26 0.32 0.34 0.38 0.36 0.40 current-sense trip threshold vs. temperature max5094/95 toc11b cs threshold (v) -40 -10 5 20 -25 35 50 95 80 110 65 125 temperature ( c) max5094c/d: v fb = 0v max5095_: v comp = 5v
max5094a/b/c/d/max5095a/b/c high-performance, single-ended, current-mode pwm controllers 8 _______________________________________________________________________________________ typical operating characteristics (continued) (v cc = 15v, t a = +25?, unless otherwise noted.) timing resistance vs. oscillator frequency max5094/95 toc12 frequency (hz) r t (k ? ) 1,000,000 100,000 1 10 100 1000 0.1 10,000 10,000,000 c t = 1nf c t = 560pf c t = 220pf c t = 100pf c t = 10nf c t = 4.7nf c t = 3.3nf c t = 2.2nf out impedance vs. temperature (r ds_on pmos driver) max5094/95 toc13 temperature ( c) r ds_on ( ? ) 110 95 65 80 -10 5 20 35 50 -25 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 2.0 -40 125 i source = 100ma 0 2 1 5 4 3 6 7 9 8 10 out impedance vs. temperature (r ds_on nmos driver) max5094/95 toc14 r ds_on ( ? ) -40 -10 5 20 -25 35 50 95 80 110 65 125 temperature ( c) i sink = 200ma 0 20 10 50 40 30 60 70 90 80 100 propagation delay from current-limit comparator to out vs. temperature max5094/95 toc15 propagation delay (ns) -40 -10 5 20 -25 35 50 95 80 110 65 125 temperature ( c) error-amplifier open-loop gain and phase vs. frequency max5094/95 toc16 frequency (hz) gain (db) 1m 100k 1k 10k 10 100 1 0 20 40 60 80 100 120 140 -20 0.01 100m 10m -165 -140 -115 -90 -65 -40 -15 10 -190 phase gain phase (degrees) 1.5 1.6 2.2 1.8 1.7 1.9 2.0 2.1 2.3 -40 -10 5 20 -25 35 50 95 80 110 65 125 comp voltage level to turn off device vs. temperature max5094/95 toc17 temperature ( c) v comp (v) v cc = 15v 100 104 102 110 108 106 112 114 118 116 120 adv_clk rising edge to out rising edge time vs. temperature max5094/95 toc18 time (ns) -40 -10 5 20 -25 35 50 95 80 110 65 125 temperature ( c) max5095c t = 20ns/div adv_clk and out waveforms out 10v/div adv_clk 5v/div load = 4.75k ? max5094/95 toc19 v cc = 15v max5095c
max5094a/b/c/d/max5095a/b/c high-performance, single-ended, current-mode pwm controllers _______________________________________________________________________________________ 9 typical operating characteristics (continued) (v cc = 15v, t a = +25?, unless otherwise noted.) pin descriptions pin name function 1 comp error-amplifier output. comp can be used for soft-start. 2 fb error-amplifier inverting input 3cs pwm comparator and overcurrent protection comparator input. the current-sense signal is compared to a signal proportional to the error-amplifier output voltage. 4r t /c t timing resistor/capacitor connection. a resistor r t from r t /c t to ref and capacitor c t from r t /c t to gnd set the oscillator frequency. 5 gnd power-supply ground. place the v cc and ref bypass capacitors close to the ic to minimize ground loops. 6 out mosfet driver output. out connects to the gate of the external n-channel mosfet. 7v cc power-supply input. bypass v cc to gnd with a 0.1? ceramic capacitor or a parallel combination of a 0.1? and a higher value ceramic capacitor. 8 ref 5v reference output. bypass ref to gnd with a 0.1? ceramic capacitor or a parallel combination of a 0.1? and a higher value ceramic capacitor no larger then 4.7?. max5094_ t = 400ns/div out source and sink currents i out 4a/div v out 10v/div max5094/95 toc20 v cc = 15v c out = 10nf 2.0 3.0 2.5 4.0 3.5 5.0 4.5 5.5 6.5 6.0 7.0 20 220 320 420 120 520 620 720 920 820 1020 supply current vs. oscillator frequency max5094/95 toc21 frequency (khz) i cc (ma) t a = +125 c max5095c c t = 100pf t a = -40 c maximum duty cycle vs. r t max5094a/max5095a max5094/95 toc22 r t ( ? ) duty cycle (%) 10,000 1000 30 40 50 60 70 80 90 100 20 100 100,000 c t = 100nf c t = 560pf c t = 220pf c t = 1000pf
max5094a/b/c/d/max5095a/b/c high-performance, single-ended, current-mode pwm controllers 10 ______________________________________________________________________________________ pin descriptions (continued) pin max5095a/ max5095b max5095c name function 1 1 comp current limit/pwm comparator input. comp is level-shifted and connected to the inverting input of the pwm comparator. pull up comp to ref through a resistor and connect an optocoupler from comp to gnd for proper operation. 2 sync bidirectional synchronization input. when synchronizing with other max5095a/max5095bs, the higher frequency part synchronizes all other devices. ? adv_clk advance clock output. adv_clk is an 85ns clock output pulse preceding the rising edge of out (see figure 4). use the pulse to drive the secondary-side synchronous rectifiers through a pulse transformer or an optocoupler (see figure 8). 33cs pwm comparator/overcurrent protection comparator input. the current-sense signal is compared to the level shifted voltage at comp. 44r t /c t timing resistor/capacitor connection. a resistor r t from r t /c t to ref and capacitor c t from r t /c t to gnd set the oscillator frequency. 5 5 gnd power-supply ground. place the v cc and ref bypass capacitors close to the ic to minimize ground loops. 6 6 out mosfet driver output. out connects to the gate of the external n-channel mosfet. 77v cc power-supply input. bypass v cc to gnd with a 0.1? ceramic capacitor or a parallel combination of a 0.1? and a higher value ceramic capacitor. 8 8 ref 5v reference output. bypass ref to gnd with a 0.1? ceramic capacitor or a parallel combination of a 0.1? and a higher value ceramic capacitor no larger than 4.7?. max5095_
detailed description the max5094_/max5095_ current-mode pwm con- trollers are designed for use as the control and regulation core of flyback or forward topology switching power sup- plies. these devices incorporate an integrated low-side driver, adjustable oscillator, error amplifier (max5094_ only), current-sense amplifier, 5v reference, and external synchronization capability (max5095a/max5095b only). an internal +26.5v current-limited v cc clamp prevents overvoltage during startup. eight different versions of the max5094/max5095 are available as shown in the selector guide. the max5094a/MAX5094B are the standard versions with a feedback input (fb) and internal error amplifier. the max5095a/max5095b include bidirectional synchroniza- tion (sync). this enables multiple max5095a/ max5095bs to be connected and synchronized to the device with the highest frequency. the max5095c includes an adv_clk output, which precedes the max5095c? drive output (out) by 110ns. figures 1, 2, and 3 show the internal functional diagrams of the max5094_, max5095a/max5095b, and max5095c, respectively. the max5094a/max5094c/max5095a are capable of 100% maximum duty cycle. the MAX5094B/ max5094d/max5095b/max5095c limit the maximum duty cycle to 50%. max5094a/b/c/d/max5095a/b/c high-performance, single-ended, current-mode pwm controllers ______________________________________________________________________________________ 11 uvlo reference 2.5v preregulator 5v voltage- divider thermal shutdown en-ref bg sns v dd 5v regulator voltage- divider 8 7 26.5v v cc ref 2.5v vp reg_ok delay s r q osc q 4 r t /c t 6 out ilim cpwm 1v (max5094a/b) 0.3v (max5094c/d) en-drv-bar r 2r vea 3 5 2 1 cs gnd fb comp clk max5094_ vp 2.5v 8.4v/7.6v 100% max duty cycle (max5094a/max5094c) 50% max duty cycle (MAX5094B/max5094d) figure 1. max5094_ functional diagram
max5094a/b/c/d/max5095a/b/c current-mode control loop the advantages of current-mode control over voltage- mode control are twofold. first, there is the feed-forward characteristic brought on by the controller? ability to adjust for variations in the input voltage on a cycle-by- cycle basis. secondly, the stability requirements of the current-mode controller are reduced to that of a single- pole system unlike the double pole in the voltage-mode control scheme. the max5094/max5095 use a current-mode control loop where the output of the error amplifier is compared to the current-sense voltage (v cs ). when the current-sense sig- nal is lower than the inverting input of the cpwm com- parator, the output of the comparator is low and the switch is turned on at each clock pulse. when the cur- rent-sense signal is higher than the inverting input of the cpwm comparator, the output is high and the switch is turned off. high-performance, single-ended, current-mode pwm controllers 12 ______________________________________________________________________________________ uvlo reference 2.5v preregulator 5v voltage- divider thermal shutdown en-ref bg sns v dd 5v regulator voltage- divider 8 7 26.5v v cc ref 2.5v vp reg_ok delay s r q osc q 4 r t /c t 6 out ilim cpwm 0.3v en-drv-bar r 2r 3 5 1 2 cs gnd comp sync clk max5095a max5095b vp 2.5v bidirectional sync 100% max duty cycle (max5095a) 50% max duty cycle (max5095b) 8.4v/7.6v figure 2. max5095a/b functional diagram
v cc and startup in normal operation, v cc is derived from a tertiary wind- ing of the transformer. however, at startup there is no energy delivered through the transformer, thus a resistor must be connected from v cc to the input power source (see r st and c st in figures 5 to 8). during startup, c st charges up through r st . the 5v reference generator, comparator, error amplifier, oscillator, and drive circuit remain off during uvlo to reduce startup current below 65?. when v cc reaches the undervoltage-lockout threshold of 8.4v, the output driver begins to switch and the tertiary winding supplies power to v cc . v cc has an internal 26.5v current-limited clamp at its input to protect the device from overvoltage during startup. size the startup resistor, r st , to supply both the maxi- mum startup bias (i start ) of the device (65? max) and the charging current for c st . the startup capacitor c st must charge to 8.4v within the desired time period t st (for example, 500ms). the size of the startup capacitor depends on: 1) ic operating supply current at a programmed oscilla- tor frequency (f osc ). 2) the time required for the bias voltage, derived from a bias winding, to go from 0 to 9v. 3) the mosfet total gate charge. 4) the operating frequency of the converter (f sw ). max5094a/b/c/d/max5095a/b/c high-performance, single-ended, current-mode pwm controllers ______________________________________________________________________________________ 13 uvlo reference 2.5v preregulator 5v voltage- divider thermal shutdown en-ref bg sns v dd 5v regulator voltage- divider 8 7 26.5v v cc ref 2.5v vp reg_ok delay s r q osc q 4 r t /c t 6 out ilim cpwm 0.3v en-drv-bar r 2r 3 5 1 2 cs gnd comp adv_clk clk max5095c vp 2.5v 50% max duty cycle 8.4v/7.6v figure 3. max5095c functional diagram
max5094a/b/c/d/max5095a/b/c to calculate the capacitance required, use the following formula: where: i g = q g f sw i cc is the max5094/max5095s?maximum internal sup- ply current after startup (see the typical operating characteristics to find the i in at a given f osc ). q g is the total gate charge for the mosfet, f sw is the converter switching frequency, v hyst is the bootstrap uvlo hys- teresis (0.8v), and t ss is the soft-start time, which is set by external circuitry. size the resistor r st according to the desired startup time period, t st , for the calculated c st . use the follow- ing equations to calculate the average charging current (i cst ) and the startup resistor (r st ): where v inmin is the minimum input supply voltage for the application (36v for telecom), v suvr is the bootstrap uvlo wake-up level (8.4v), and i start is the v in supply current at startup (65?, max). choose a higher value for r st than the one calculated above if longer startup times can be tolerated to minimize power loss in r st . the equation for c st above gives a good approximation of c st , yet neglects the current through r st . fine tune c st using: the above startup method is applicable to circuits where the tertiary winding has the same phase as the output windings. thus, the voltage on the tertiary winding at any given time is proportional to the output voltage and goes through the same soft-start period as the output voltage. the minimum discharge time of c st from 8.4v to 7.6v must be greater than the soft-start time (t ss ). undervoltage lockout (uvlo) the minimum turn-on supply voltage for the max5094/max5095 is 8.4v. once v cc reaches 8.4v, the reference powers up. there is 0.8v of hysteresis from the minimum turn-on voltage to the uvlo thresh- old. once v cc reaches 8.4v, the max5094/max5095 operates with v cc down to 7.6v. once v cc goes below 7.6v the device is in uvlo. when in uvlo, the quies- cent supply current into v cc falls back to 32? (typ), and out and ref are pulled low. mosfet driver out drives an external n-channel mosfet and swings from gnd to v cc . ensure that v cc remains below the absolute maximum v gs rating of the external mosfet. out is a push-pull output with the on-resistance of the pmos typically 3.5 ? and the on-resistance of the nmos typically 4.5 ? . the driver can source 2a typically and sink 1a typically. this allows for the max5094/max5095 to quickly turn on and off high gate-charge mosfets. bypass v cc with one or more 0.1? ceramic capacitors to gnd, placed close to the max5094/max5095. the average current sourced to drive the external mosfet depends on the total gate charge (q g ) and operating frequency of the converter. the power dissipation in the max5094/max5095 is a function of the average output- drive current (i drive ). use the following equation to cal- culate the power dissipation in the device due to i drive : i drive = q g x f sw pd = (i drive + i cc ) x v cc where, i cc is the operating supply current. see the typical operating characteristics for the operating supply current at a given frequency. error amplifier (max5094) the max5094 includes an internal error amplifier. the inverting input is at fb and the noninverting input is inter- nally connected to a 2.5v reference. the internal error amplifier is useful for nonisolated converter design (see figure 6) and isolated design with primary-side regulation through a bias winding (see figure 5). in the case of a nonisolated power supply, the output voltage is: where, r1 and r2 are from figure 6. v r r v out =+ ? ? ? ? ? ? 1 1 2 25 . c ii vv r v t st cc g inmin st hyst ss = +? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 8 () r v v ii st inmin suvr cst start ? ? ? ? ? ? ? ? + 2 i vc t cst suvr st st = c iit v st cc g ss hyst = + [] () high-performance, single-ended, current-mode pwm controllers 14 ______________________________________________________________________________________
max5095_feedback the max5095a/max5095b/max5095c use either an external error amplifier when designed into a nonisolat- ed converter or an error amplifier and optocoupler when designed into an isolated power supply. the comp input is level-shifted and connected to the inverting terminal of the pwm comparator (cpwm). connect the comp input to the output of the external error amplifier for nonisolated design. pull comp high externally to 5v (or ref) and connect the optocoupler transistor as shown in figures 7 and 8. comp can be used for soft-start and also as a shutdown. see the typical operating characteristics to find the turn-off comp voltage at different temperatures. oscillator the oscillator frequency is programmed by adding an external capacitor and resistor at r t /c t (see r t and c t in the typical application circuits ). r t is connected from r t /c t to the 5v reference (ref) and c t is con- nected from r t /c t to gnd. ref charges c t through r t until its voltage reaches 2.8v. c t then discharges through an 8.3ma internal current sink until c t ? voltage reaches 1.1v, at which time c t is allowed to charge through r t again. the oscillator? period will be the sum of the charge and discharge times of c t . calculate the charge time as t c = 0.57 x r t x c t the discharge time is then the oscillator frequency will then be for the max5094a/max5094c/max5095a, the convert- er output switching frequency (f sw ) is the same as the oscillator frequency (f osc ). for the MAX5094B/ max5094d/max5095b/max5095c, the output switch- ing frequency is 1/2 the oscillator frequency. reference output ref is a 5v reference output that can source 20ma. bypass ref to gnd with a 0.1? capacitor. current limit the max5094/max5095 include a fast current-limit com- parator to terminate the on cycle during an overload or a fault condition. the current-sense resistor (r cs ), connect- ed between the source of the mosfet and gnd, sets the current limit. the cs input has a voltage trip level (v cs ) of 1v (max5094a/b) or 0.3v (max5094c/d, max5095_). use the following equation to calculate r cs : i p-p is the peak current in the primary that flows through the mosfet. when the voltage produced by this current (through the current-sense resistor) exceeds the current- limit comparator threshold, the mosfet driver (out) will turn the switch off within 60ns. in most cases, a small rc filter is required to filter out the leading-edge spike on the sense waveform. set the time constant of the rc filter at 50ns. use a current transformer to limit the losses in the current-sense resistor and achieve higher efficiency especially at low input-voltage operation. synchronization (max5095a/max5095b) sync sync is a bidirectional input/output that outputs a syn- chronizing pulse and accepts a synchronizing pulse from other max5095a/max5095bs (see figures 7 and 9). as an output, sync is an open-drain p-channel mosfet driven from the internal oscillator and requires an external pulldown resistor (r sync ) between 500 ? and 5k ? . as an input, sync accepts the output pulses from other max5095a/max5095bs. synchronize multiple max5095a/max5095bs by con- necting their sync pins together. all devices connected together will synchronize to the one operating at the highest frequency. the rising edge of sync will precede the rising edge of out by approximately the discharge time (t d ) of the oscillator (see the oscillator section). the pulse width of the sync output is equal to the time required to discharge the stray capacitance at sync through r sync plus the c t discharge time t d . adjust r t /c t such that the minimum discharge time t d is 200ns. r v i cs cs pp = ? f tt osc cd = + 1 t rc r d tt t = ? 10 488 18 10 3 3 .. max5094a/b/c/d/max5095a/b/c high-performance, single-ended, current-mode pwm controllers ______________________________________________________________________________________ 15
max5094a/b/c/d/max5095a/b/c advance clock output (adv_clk) (max5095c) adv_clk is an advanced pulse output provided to facilitate the easy implementation of secondary-side synchronous rectification using the max5095c. the adv_clk pulse width is 85ns (typically) with its rising edge leading the rising edge of out by 110ns. use this leading pulse to turn off the secondary-side syn- chronous-rectifier mosfet (qs) before the voltage appears on the secondary (see figure 8). turning off the secondary-side synchronous mosfet earlier avoids the shorting of the secondary in the forward converter. the adv_clk pulse can be propagated to the secondary side using a pulse transformer or high- speed optocoupler. the 85ns pulse, with 3v drive volt- age (10ma source), significantly reduces the volt-second requirement of the pulse transformer and the advanced pulse alleviates the need for a high- speed optocoupler. thermal shutdown when the max5094/max5095? die temperature goes above +150?, the thermal shutdown circuitry will shut down the 5v reference and pull out low. high-performance, single-ended, current-mode pwm controllers 16 ______________________________________________________________________________________ t adv_clk = 110ns t pulse = 85ns out adv_clk r t /c t figure 4. adv_clk typical application circuits r t r1 r2 1 2 4 3 ref v cc gnd out comp fb r t /c t cs 8 7 5 6 max5094_ c t r st v in c st v out n r cs figure 5. max5094_ typical application circuit (isolated flyback with primary-side regulation)
max5094a/b/c/d/max5095a/b/c high-performance, single-ended, current-mode pwm controllers ______________________________________________________________________________________ 17 typical application circuits (continued) r t r1 r2 1 2 4 3 ref v cc gnd out comp fb r t /c t cs 8 7 5 6 max5094_ c t r st v in c st r cs v out n figure 6. max5094_ typical application circuit (nonisolated flyback) r t 1 2 4 3 ref v cc gnd out comp sync r t /c t cs 8 7 5 6 max5095a max5095b c t r st v in c st v out sync input/output n r sync r cs figure 7. max5095a/max5095b typical application circuit (isolated flyback)
max5094a/b/c/d/max5095a/b/c high-performance, single-ended, current-mode pwm controllers 18 ______________________________________________________________________________________ typical application circuits (continued) max5095c v cc gnd comp r t /c t ref cs out r t c t v in adv_clk c st r st 0.5v/ s pulse transformer max5078 v d qr n n n qs v out v d r cs figure 8. max5095c typical application circuit (isolated forward with secondary-side synchronous rectification)
max5094a/b/c/d/max5095a/b/c high-performance, single-ended, current-mode pwm controllers ______________________________________________________________________________________ 19 max5095a max5095b v cc gnd sync r t /c t ref cs out r t c t v in max5095a max5095b v cc gnd sync r t /c t ref cs out r t c t v in max5095a max5095b v cc gnd sync r t /c t ref cs out r t c t v in to other max5095a/bs r sync nn n figure 9. synchronization of max5095a/max5095b
max5094a/b/c/d/max5095a/b/c high-performance, single-ended, current-mode pwm controllers 20 ______________________________________________________________________________________ chip information transistor count: 1987 process: bicmos out gnd r t /c t 1 2 8 7 ref v cc sync cs comp max top view 3 4 6 5 max5095a max5095b out gnd r t /c t 1 2 8 7 ref v cc adv_clk cs comp max 3 4 6 5 max5095c pin configurations (continued) selector guide part feature uvlo threshold (v) cs threshold (v) max duty cycle (%) competitors part number pin- package max5094aasa feedback 8.4 1 100 ucc28c43 2nd source 8 so max5094aaua feedback 8.4 1 100 ucc28c43 2nd source 8 ?ax MAX5094Basa feedback 8.4 1 50 ucc28c45 2nd source 8 so MAX5094Baua feedback 8.4 1 50 ucc28c45 2nd source 8 ?ax max5094casa feedback 8.4 0.3 100 improved ucc28c43 8 so max5094caua feedback 8.4 0.3 100 improved ucc28c43 8 ?ax max5094daua feedback 8.4 0.3 50 improved ucc28c45 8 ?ax max5095aaua sync 8.4 0.3 100 improved ucc28c43 8 ?ax max5095baua sync 8.4 0.3 50 improved ucc28c45 8 ?ax max5095caua adv_clk 8.4 0.3 50 improved ucc28c45 8 ?ax ordering information (continued) part temp range pin- package pkg code max5094c asa* -40 c to +125 c 8 so s8-4 max5094casa+ -40 c to +125 c 8 so s8-4 max5094caua* -40 c to +125 c 8 ?ax u8-1 max5094caua+ -40 c to +125 c 8 ?ax u8-1 max5094d aua* -40 c to +125 c 8 ?ax u8-1 max5094daua+ -40 c to +125 c 8 ?ax u8-1 max5095a aua -40 c to +125 c 8 ?ax u8-1 max5095aaua+* -40 c to +125 c 8 ?ax u8-1 max5095b aua* -40 c to +125 c 8 ?ax u8-1 max5095baua+ -40 c to +125 c 8 ?ax u8-1 max5095c aua* -40 c to +125 c 8 ?ax u8-1 max5095caua+ -40 c to +125 c 8 ?ax u8-1 + denotes lead-free package. * future product?ontact factory for availability.
max5094a/b/c/d/max5095a/b/c high-performance, single-ended, current-mode pwm controllers ______________________________________________________________________________________ 21 package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .) soicn .eps package outline, .150" soic 1 1 21-0041 b rev. document control no. approval proprietary information title: top view front view max 0.010 0.069 0.019 0.157 0.010 inches 0.150 0.007 e c dim 0.014 0.004 b a1 min 0.053 a 0.19 3.80 4.00 0.25 millimeters 0.10 0.35 1.35 min 0.49 0.25 max 1.75 0.050 0.016 l 0.40 1.27 0.394 0.386 d d min dim d inches max 9.80 10.00 millimeters min max 16 ac 0.337 0.344 ab 8.75 8.55 14 0.189 0.197 aa 5.00 4.80 8 n ms012 n side view h 0.244 0.228 5.80 6.20 e 0.050 bsc 1.27 bsc c h e e b a1 a d 0 -8 l 1 variations:
max5094a/b/c/d/max5095a/b/c high-performance, single-ended, current-mode pwm controllers maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 22 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2006 maxim integrated products is a registered trademark of maxim integrated products, inc. package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .) 8lumaxd.eps package outline, 8l umax/usop 1 1 21-0036 j rev. document control no. approval proprietary information title: max 0.043 0.006 0.014 0.120 0.120 0.198 0.026 0.007 0.037 0.0207 bsc 0.0256 bsc a2 a1 c e b a l front view side view e h 0.60.1 0.60.1 ?0.500.1 1 top view d 8 a2 0.030 bottom view 1 6 s b l h e d e c 0 0.010 0.116 0.116 0.188 0.016 0.005 8 4x s inches - a1 a min 0.002 0.95 0.75 0.5250 bsc 0.25 0.36 2.95 3.05 2.95 3.05 4.78 0.41 0.65 bsc 5.03 0.66 6 0 0.13 0.18 max min millimeters - 1.10 0.05 0.15 dim

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